Hardware/litex
1
0
Fork 0
mirror of https://github.com/enjoy-digital/litex.git synced 2025-01-04 09:52:26 -05:00
Code Issues Projects Releases Packages Wiki Activity
1151 commits 42 branches 14 tags 31 MiB
Commit graph

5 commits

Author SHA1 Message Date
Florent Kermarrec
f03aa76292 migen: create VerilogConvert and EDIFConvert classes and return it with convert functions 2015-03-30 11:37:55 +02:00
Florent Kermarrec
dbaeaf7833 remove trailing whitespaces 2014-10-17 17:08:46 +08:00
Nina Engelhardt
efa7dc9cf4 fhdl/edif: adjust for use with mibuild 2013-08-03 10:54:06 +02:00
Nina Engelhardt
7372c7a97c fhdl/edif: add support for inout signals 2013-08-03 10:51:24 +02:00
Nina Engelhardt
17002fb05e fhdl: add EDIF back-end 2013-07-31 22:47:43 +02:00