8 commits

Author	SHA1	Message	Date
Sebastien Bourdeauducq	b94647ab16	k7ddrphy: suppress idiotic bitgen warning about ISERDES IOBDELAY parameter	2014-08-22 18:45:25 +08:00
Florent Kermarrec	1c381acc6f	k7ddrphy: fix read_latency (CL is 2 sys_clk since we use quarter rate)	2014-08-14 22:46:06 +08:00
Florent Kermarrec	acbba37f5f	k7ddrphy: set bitslip to 0 on ISERDESE2 (needed at least for sim)	2014-08-14 22:46:06 +08:00
Florent Kermarrec	2e4bfe154f	k7ddrphy: add ODELAYE2 on dm path to match dq path (ODELAYE2 even configure with a delay of 0 generates a delay)	2014-08-14 22:46:06 +08:00
Florent Kermarrec	bb85f29f91	k7ddrphy: fix write_latency and take care of OSERDESE2 latency on oe	2014-08-14 22:46:06 +08:00
Florent Kermarrec	9844c25df9	k7ddrphy: add SERDES reset	2014-08-14 14:16:41 +08:00
Sebastien Bourdeauducq	c8dd4d2b40	k7ddrphy: send rddata_valid on all phases	2014-08-09 11:00:13 +08:00
Sebastien Bourdeauducq	a2c7ff4c0c	sdramphy: initial K7 DDR3 support	2014-08-08 21:28:26 +08:00