85 lines
2.2 KiB
Python
85 lines
2.2 KiB
Python
# Copyright (C) 2012 Vermeer Manufacturing Co.
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# License: GPLv3 with additional permissions (see README).
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from math import cos, pi
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from scipy import signal
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import matplotlib.pyplot as plt
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from migen.fhdl.structure import *
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from migen.fhdl import verilog
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from migen.corelogic.misc import optree
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from migen.fhdl import autofragment
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from migen.sim.generic import Simulator
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from migen.sim.icarus import Runner
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# A synthesizable FIR filter.
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class FIR:
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def __init__(self, coef, wsize=16):
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self.coef = coef
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self.wsize = wsize
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self.i = Signal(BV(self.wsize, True))
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self.o = Signal(BV(self.wsize, True))
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def get_fragment(self):
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muls = []
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sync = []
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src = self.i
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for c in self.coef:
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sreg = Signal(BV(self.wsize, True))
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sync.append(sreg.eq(src))
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src = sreg
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c_fp = int(c*2**(self.wsize - 1))
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c_e = Constant(c_fp, BV(bits_for(c_fp), True))
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muls.append(c_e*sreg)
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sum_full = Signal(BV(2*self.wsize-1, True))
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sync.append(sum_full.eq(optree("+", muls)))
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comb = [self.o.eq(sum_full[self.wsize-1:])]
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return Fragment(comb, sync)
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# A test bench for our FIR filter.
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# Generates a sine wave at the input and records the output.
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class TB:
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def __init__(self, fir, frequency):
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self.fir = fir
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self.frequency = frequency
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self.inputs = []
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self.outputs = []
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def do_simulation(self, s):
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f = 2**(self.fir.wsize - 1)
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v = 0.1*cos(2*pi*self.frequency*s.cycle_counter)
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s.wr(self.fir.i, int(f*v))
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self.inputs.append(v)
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self.outputs.append(s.rd(self.fir.o)/f)
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def get_fragment(self):
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return Fragment(sim=[self.do_simulation])
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def main():
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# Compute filter coefficients with SciPy.
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coef = signal.remez(80, [0, 0.1, 0.1, 0.5], [1, 0])
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fir = FIR(coef)
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# Simulate for different frequencies and concatenate
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# the results.
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in_signals = []
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out_signals = []
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for frequency in [0.05, 0.07, 0.1, 0.15, 0.2]:
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tb = TB(fir, frequency)
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fragment = autofragment.from_local()
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sim = Simulator(fragment, Runner())
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sim.run(100)
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in_signals += tb.inputs
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out_signals += tb.outputs
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# Plot data from the input and output waveforms.
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plt.plot(in_signals)
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plt.plot(out_signals)
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plt.show()
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# Print the Verilog source for the filter.
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print(verilog.convert(fir.get_fragment(),
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ios={fir.i, fir.o}))
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main()
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