litex/misoclib/com/litepcie/example_designs
Florent Kermarrec 40740d3ddc litepcie: use optional platform.misoc_path to add litepcie phy wrapper verilog files
We should eventually try to use python package_data or data_file for that.
2015-07-22 18:09:04 +02:00
..
build add litepcie core 2015-04-17 13:45:01 +02:00
targets litepcie: use optional platform.misoc_path to add litepcie phy wrapper verilog files 2015-07-22 18:09:04 +02:00
test use similar names for wishbone bridges and move wishbone drivers to [core]/software 2015-05-02 16:22:30 +02:00
__init__.py add litepcie core 2015-04-17 13:45:01 +02:00
make.py lite* cores: changes permissions (+x) on make.py files and on litepcie init.sh file 2015-04-18 08:51:59 -04:00