Karol Gugala d101ef7ed0 software: libc: fix Makefile dependecies ... Signed-off-by: Karol Gugala <kgugala@antmicro.com>		2021-09-27 23:05:54 +02:00
..
build	Merge branch 'master' into dev/litex-sim-gmii-xgmii	2021-09-27 17:47:26 +02:00
compat	soc/add_spi_flash: Move integration code for previous LiteX SPI Flash core to compat/soc_add_spi_flash.py.	2021-07-29 18:48:03 +02:00
gen	gen/fhdl/verilog: Make DummyAttrTranslate a dict.	2021-07-15 16:48:24 +02:00
soc	software: libc: fix Makefile dependecies	2021-09-27 23:05:54 +02:00
tools	Merge branch 'master' into dev/litex-sim-gmii-xgmii	2021-09-27 17:47:26 +02:00
__init__.py	revert get_data_mod change (Vexrisv SMP repo has been renamed to pythondata-cpu-vexriscv_smp).	2020-11-05 19:55:18 +01:00