litex/misoclib/com
Florent Kermarrec 30eed19283 liteusb: continue refactoring and add core_tb (should be almost OK) 2015-04-28 18:58:38 +02:00
..
gpio global: pep8 (E302) 2015-04-13 16:47:22 +02:00
liteeth liteeth: use Migen's Packetizer/Depacketizer, remove generic and move etherbone/tty to frontend 2015-04-28 18:51:40 +02:00
litepcie liteusb: begin refactoring and simplification (wip) 2015-04-27 15:22:49 +02:00
liteusb liteusb: continue refactoring and add core_tb (should be almost OK) 2015-04-28 18:58:38 +02:00
spi global: pep8 (W262) 2015-04-13 17:02:59 +02:00
uart misoclib/com/uart: remove liteeth dependency (copy/paste error) 2015-04-28 18:53:46 +02:00
__init__.py misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00