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351e654e9d
litex
/
misoclib
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com
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liteeth
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example_designs
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targets
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Florent Kermarrec
369cf4c4d7
liteeth/example_designs: add false path between clock domains (speed up implementation) and use automatic PHY detection
2015-06-23 01:08:49 +02:00
..
__init__.py
…
base.py
liteeth/example_designs: add false path between clock domains (speed up implementation) and use automatic PHY detection
2015-06-23 01:08:49 +02:00
etherbone.py
…
tty.py
…
udp.py
…