litex/litex
Florent Kermarrec 39d292a3c7 build/efinix/common: Deprecate passing clk as str to avoid previous approach with pre-generated names. 2024-09-26 10:38:05 +02:00
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build build/efinix/common: Deprecate passing clk as str to avoid previous approach with pre-generated names. 2024-09-26 10:38:05 +02:00
compat compat/soc_core: Fix register_mem/rom missing imports. 2022-11-09 19:11:15 +01:00
gen gen/fhdl/hierarchy: Sort instances to generate deterministic hierarchy in verilog. 2024-07-03 21:44:31 +02:00
soc soc/interconnect/stream: Add Delay module. 2024-09-23 12:23:29 +02:00
tools Merge pull request #1974 from motec-research/dts_zephyr_updates 2024-09-17 14:58:51 +02:00
__init__.py get_data_mod(): fix recursive exception reporting 2024-04-22 12:09:45 +10:00