litex/misoclib/com/liteeth/phy
Florent Kermarrec 4329e3e1b9 liteeth/phy/mii: allow use of MII phy on GMII/MII chips that do not have phy clock provided by the FPGA (tested on KC705) 2015-04-12 14:28:17 +02:00
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__init__.py liteeth/phy: typo (thanks sb) 2015-03-12 21:54:10 +01:00
gmii.py liteeth/phy/gmii : set tx_er to 0 only if it exits 2015-03-17 12:24:06 +01:00
loopback.py misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00
mii.py liteeth/phy/mii: allow use of MII phy on GMII/MII chips that do not have phy clock provided by the FPGA (tested on KC705) 2015-04-12 14:28:17 +02:00
sim.py liteeth/phy/sim: create ethernet tap in __init__ and destroy it in do_exit 2015-03-09 17:21:29 +01:00