Florent Kermarrec 51ce7cad6f sdram/phy/simphy: expose settings to user and test with DDR/LPDDR/DDR2		2015-03-28 01:18:35 +01:00
..
core	sdram/core/lasmicon: add enabled parameter to refresher (for some simulations we need to disable it)	2015-03-28 01:17:50 +01:00
frontend	sdram: reintroduce dat_ack change (it was a small issue on wishbone writes (sending data 1 clock cycle too late) that was not detected by memtest)	2015-03-02 10:59:43 +01:00
phy	sdram/phy/simphy: expose settings to user and test with DDR/LPDDR/DDR2	2015-03-28 01:18:35 +01:00
test	sdram: use names that are more explicit for bank_a, row_a,...: bankbits, rowbits, .... Add databits to GeomSettings.	2015-03-25 16:56:29 +01:00
__init__.py	sdram: remove nbits from modules and databits from GeomSettings	2015-03-26 23:27:37 +01:00
module.py	sdram/module: clean up tREFI. (use 64ms/8k or 4k)	2015-03-28 01:09:21 +01:00