litex/misoclib/mem
Florent Kermarrec 52fba05e26 sdram/phy/initsequence: add burst chop 4 (BC4) for DDR3
This is needed for half rate controllers with burst length of 4.
For best efficiency quarter rate controllers should be used.
2015-08-04 11:19:20 +02:00
..
flash spiflash: fix miso bitbang with large DQ 2015-05-06 00:05:25 +08:00
litesata use sets for leave_out 2015-07-05 22:49:23 +02:00
sdram sdram/phy/initsequence: add burst chop 4 (BC4) for DDR3 2015-08-04 11:19:20 +02:00
__init__.py misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00