Sebastien Bourdeauducq 5d5d5edfe2 spiflash: fix miso bitbang with large DQ		2015-05-06 00:05:25 +08:00
..
flash	spiflash: fix miso bitbang with large DQ	2015-05-06 00:05:25 +08:00
litesata	use similar names for wishbone bridges and move wishbone drivers to [core]/software	2015-05-02 16:22:30 +02:00
sdram	global: more pep8	2015-04-13 18:02:26 +02:00
__init__.py	misoclib: better organization (create cores categories: cpu, mem, com, ...)	2015-02-28 09:40:44 +01:00