litex/verilog
Sebastien Bourdeauducq 6462ee7fe1 Upgrade mor1kx. This fixes the UART bug that was due to IRQ 0 and 1 being non-maskable. 2014-07-04 10:29:42 +02:00
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lm32 update submodule 2013-12-06 00:07:05 +01:00
minimac3 minimac3: move psync 2013-04-25 18:36:45 +02:00
mor1kx Upgrade mor1kx. This fixes the UART bug that was due to IRQ 0 and 1 being non-maskable. 2014-07-04 10:29:42 +02:00
mxcrg framebuffer: prepare for DVI out 2013-09-17 18:15:22 +02:00