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litex/verilog/mor1kx
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Sebastien Bourdeauducq 6462ee7fe1 Upgrade mor1kx. This fixes the UART bug that was due to IRQ 0 and 1 being non-maskable. 2014-07-04 10:29:42 +02:00
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submodule@bae88d1bbc Upgrade mor1kx. This fixes the UART bug that was due to IRQ 0 and 1 being non-maskable. 2014-07-04 10:29:42 +02:00