litex/misoclib/com
Florent Kermarrec 3cf46671e9 liteeth/phy: rename rgmii to s6rgmii since specific to Spartan6
Also remove autodetection support for RGMII. For it to work we would need to pass the device we are building for.
2015-08-05 10:33:08 +02:00
..
liteeth liteeth/phy: rename rgmii to s6rgmii since specific to Spartan6 2015-08-05 10:33:08 +02:00
litepcie litepcie/frontend/dma: group loop index and count in loop_status register (avoid 2 register reads) 2015-07-24 13:52:57 +02:00
liteusb liteusb/core/packet: fix missing , 2015-05-25 13:53:02 +02:00
spi global: pep8 (W262) 2015-04-13 17:02:59 +02:00
uart misoclib/com/uart: remove irq condition parameters and use "non-full" for tx irq, "non-empty" for rx irq. 2015-07-25 00:25:09 +02:00
__init__.py misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00
gpio.py cores: avoid having too much directories when possible (for simple cores or cores contained in a single file) 2015-05-02 16:22:33 +02:00