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litex/misoclib/mem
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Florent Kermarrec 69e869893d remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future)
2015-02-28 11:36:15 +01:00
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flash misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00
litesata remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future) 2015-02-28 11:36:15 +01:00
sdram misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00
__init__.py misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00