__ _ __ _______ _________
/ / (_) /____ / __/ _ /_ __/ _ |
/ /__/ / __/ -_)\ \/ __ |/ / / __ |
/____/_/\__/\__/___/_/ |_/_/ /_/ |_|
Copyright 2014-2015 / Florent Kermarrec / florent@enjoy-digital.fr
A lite open-source SATA1/2/3 controller
developed in partnership with M-Labs Ltd & HKU
[> Getting started
------------------
1. Install Python3 and Xilinx's Vivado software.
2. Obtain Migen and install it:
git clone https://github.com/enjoy-digital/migen
cd migen
python3 setup.py install
cd ..
3. Obtain Miscope and install it:
git clone https://github.com/enjoy-digital/miscope
cd miscope
python3 setup.py install
cd ..
4. Obtain MiSoC:
git clone https://github.com/enjoy-digital/misoc --recursive
5. Copy lite-sata in working directory and move to it.
6. Build and load design:
make all
7. Test design:
go to test directory
python3 bist.py
[> Simulations :
Simulation are avalaible in ./lib/sata/test:
- crc_tb
- scrambler_tb
- phy_datapath_tb
- link_tb
- command_tb
- bist_tb
hdd.py is a HDD model implementing all SATA layers.
To run a simulation, move to the simulation directory and run:
make simulation_name
[> Tests :
A synthetisable BIST is provided. It can be controled with ./test/bist.py
Using Miscope and the provided example ./test/test_link.py you are able to
visualize every event of the design and even inject your data in the HDD
model!
[> Contact
E-mail: florent@enjoy-digital.fr
6f2c7a236c