Florent Kermarrec 70469e1f37 sdram: simplify the way we pass settings to controller and rename ramcon_type to sdram_controller_type (more explicit)		2015-03-21 21:32:39 +01:00
..
flash	spiflash: style	2015-03-03 00:54:30 +00:00
litesata	litexxx cores: use default baudrate of 115200 for all tests	2015-03-20 12:22:53 +01:00
sdram	sdram: simplify the way we pass settings to controller and rename ramcon_type to sdram_controller_type (more explicit)	2015-03-21 21:32:39 +01:00
__init__.py	misoclib: better organization (create cores categories: cpu, mem, com, ...)	2015-02-28 09:40:44 +01:00