litex/litex/soc
Tim 'mithro' Ansell 718a65c3c9 software: enable link time optimization (LTO)
Co-authored-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
2020-02-24 16:12:21 +01:00
..
cores Fix ECP5PLL VCO frequency range 2020-02-24 14:39:59 +01:00
doc doc: fix regression with new irq manager 2020-02-13 08:32:44 +08:00
integration integration/soc: improve presentation of SoCLocHandler's locations. 2020-02-24 13:37:38 +01:00
interconnect interconnect/axi: remove bus_name on connect_to_pads 2020-02-24 13:24:32 +01:00
software software: enable link time optimization (LTO) 2020-02-24 16:12:21 +01:00
__init__.py