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73c2b7ebaa
litex
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misoclib
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mem
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Florent Kermarrec
92f81409f2
sdram/module: fix tREFI on AS4C16M16
2015-03-22 03:20:02 +01:00
..
flash
spiflash: style
2015-03-03 00:54:30 +00:00
litesata
litexxx cores: use default baudrate of 115200 for all tests
2015-03-20 12:22:53 +01:00
sdram
sdram/module: fix tREFI on AS4C16M16
2015-03-22 03:20:02 +01:00
__init__.py
misoclib: better organization (create cores categories: cpu, mem, com, ...)
2015-02-28 09:40:44 +01:00