Florent Kermarrec 92f81409f2 sdram/module: fix tREFI on AS4C16M16		2015-03-22 03:20:02 +01:00
..
core	sdram: pass sdram_controller_settings to SDRAMSoC	2015-03-21 23:12:18 +01:00
frontend	sdram: reintroduce dat_ack change (it was a small issue on wishbone writes (sending data 1 clock cycle too late) that was not detected by memtest)	2015-03-02 10:59:43 +01:00
phy	sdram: move lasmibus to core, rename crossbar to lasmixbar and move it to core, move dfi to phy	2015-03-03 09:55:25 +01:00
test	sdram: move lasmibus to core, rename crossbar to lasmixbar and move it to core, move dfi to phy	2015-03-03 09:55:25 +01:00
__init__.py	sdram: simplify the way we pass settings to controller and rename ramcon_type to sdram_controller_type (more explicit)	2015-03-21 21:32:39 +01:00
module.py	…