Jędrzej Boczar 78a631f392 test/axi: add AXILite2CSR and AXILiteSRAM tests		2020-07-15 12:40:39 +02:00
..
boards	targets: remove sdcard clock domain (now generated in the PHY).	2020-07-03 20:11:05 +02:00
build	build/lattice/trellis: set default spimode to None (--spimode not passed to ecppack) as default instead of fast-read.	2020-07-13 11:55:03 +02:00
gen	litex/gen: remove io that has been replaced with litex/build/io (and should have been removed).	2020-07-07 08:14:42 +02:00
soc	test/axi: add AXILite2CSR and AXILiteSRAM tests	2020-07-15 12:40:39 +02:00
tools	integration/soc/sdcard: cleanup emulator integration, fix sim.	2020-07-07 15:05:07 +02:00
__init__.py	litex/__init__.py: remove retro-compat > 6 months old.	2020-04-30 21:31:58 +02:00