Sebastien Bourdeauducq 154ad54a8e platforms/kc705: fix imports		2015-03-03 02:03:14 +00:00
..
__init__.py	merge Mibuild into Migen	2013-11-23 10:45:15 +01:00
apf27.py	platforms: add default_clk_freq/default_clk_name (to use it on simple designs to test MiSOC on various platforms)	2015-02-26 12:51:57 +01:00
apf51.py	platforms: add default_clk_freq/default_clk_name (to use it on simple designs to test MiSOC on various platforms)	2015-02-26 12:51:57 +01:00
de0nano.py	platforms: add default_clk_freq/default_clk_name (to use it on simple designs to test MiSOC on various platforms)	2015-02-26 12:51:57 +01:00
kc705.py	platforms/kc705: fix imports	2015-03-03 02:03:14 +00:00
lx9_microboard.py	platforms: add default_clk_freq/default_clk_name (to use it on simple designs to test MiSOC on various platforms)	2015-02-26 12:51:57 +01:00
m1.py	mibuild: move identifier to platforms	2015-02-26 19:00:43 +01:00
mixxeo.py	mibuild: move identifier to platforms	2015-02-26 19:00:43 +01:00
ml605.py	mibuild: fix missing xilinx_common -->xilinx.common change	2015-02-26 14:04:36 +01:00
papilio_pro.py	mibuild: move identifier to platforms	2015-02-26 19:00:43 +01:00
pipistrello.py	platforms/pipistrello: remove unconnected SDRAM pins	2015-02-28 16:20:44 -07:00
rhino.py	mibuild: fix missing xilinx_common -->xilinx.common change	2015-02-26 14:04:36 +01:00
roach.py	mibuild: better file organization (create directory for each vendor and move programmers in it)	2015-02-26 12:25:59 +01:00
sim.py	mibuild: initial Verilator support	2015-03-01 18:27:46 +01:00
usrp_b100.py	mibuild: fix missing xilinx_common -->xilinx.common change	2015-02-26 14:04:36 +01:00
zedboard.py	platforms: add default_clk_freq/default_clk_name (to use it on simple designs to test MiSOC on various platforms)	2015-02-26 12:51:57 +01:00
ztex_115d.py	platforms: add default_clk_freq/default_clk_name (to use it on simple designs to test MiSOC on various platforms)	2015-02-26 12:51:57 +01:00