litex/misoclib
Florent Kermarrec 8280acd3a7 sdram: only keep frontend logic and sdram core declaration in soc/sdram.py, move other logic to sdram/core 2015-03-02 12:17:49 +01:00
..
com sdram: create frontend dir and move dma_lasmi/memtest/wishbone2lasmi to it 2015-03-02 08:36:39 +01:00
cpu litescope: create example design derived from SoC that can be used on all targets 2015-02-28 22:19:24 +01:00
mem sdram: only keep frontend logic and sdram core declaration in soc/sdram.py, move other logic to sdram/core 2015-03-02 12:17:49 +01:00
others move mxcrg to others (we should integrate it in mlabs_video.py and remove the verilog file in the future) 2015-02-28 11:51:51 +01:00
soc sdram: only keep frontend logic and sdram core declaration in soc/sdram.py, move other logic to sdram/core 2015-03-02 12:17:49 +01:00
tools uart: use data instead of d on endpoint's layouts (coherency with others cores) 2015-03-01 16:56:48 +01:00
video sdram: create frontend dir and move dma_lasmi/memtest/wishbone2lasmi to it 2015-03-02 08:36:39 +01:00
__init__.py rename milkymist-ng to MiSoC 2013-11-09 15:27:32 +01:00