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8280acd3a7
litex
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misoclib
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tools
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litescope
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example_designs
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Florent Kermarrec
649cdeb265
liteXXX cores: use new uart and import FlipFlop/Counter/Timeout from Migen
2015-03-01 16:48:41 +01:00
..
targets
liteXXX cores: use new uart and import FlipFlop/Counter/Timeout from Migen
2015-03-01 16:48:41 +01:00
test
liteXXX cores: share same methodology for on-board tests
2015-03-01 11:21:12 +01:00
make.py
liteXXX cores: remove setup.py and relative paths (we will install misolib of use PYTHON_PATH)
2015-02-28 22:23:48 +01:00