Florent Kermarrec 8b86b16077 soc/cores/hyperbus: Make Rst synchronous to allow IO Reg (even if low speed).		2024-08-20 15:26:26 +02:00
..
build	Merge pull request #2028 from VOGL-electronic/spi_ram_add	2024-08-16 19:08:48 +02:00
compat	compat/soc_core: Fix register_mem/rom missing imports.	2022-11-09 19:11:15 +01:00
gen	gen/fhdl/hierarchy: Sort instances to generate deterministic hierarchy in verilog.	2024-07-03 21:44:31 +02:00
soc	soc/cores/hyperbus: Make Rst synchronous to allow IO Reg (even if low speed).	2024-08-20 15:26:26 +02:00
tools	tools/litex_sim: Cleanup imports.	2024-07-18 12:16:23 +02:00
__init__.py	get_data_mod(): fix recursive exception reporting	2024-04-22 12:09:45 +10:00