Sebastien Bourdeauducq 8cf7c96a53 crg: use new platform.request		2013-03-26 23:08:35 +01:00
..
platforms	altera_quartus, de0nano: add copyright notices	2013-03-15 12:37:25 +01:00
__init__.py
altera_quartus.py	altera_quartus: fix clock domain name	2013-03-26 23:05:46 +01:00
crg.py	crg: use new platform.request	2013-03-26 23:08:35 +01:00
generic_platform.py	Support for platform info	2013-03-26 19:17:35 +01:00
tools.py	Support adding Verilog/VHDL files	2013-02-08 20:25:20 +01:00
xilinx_ise.py	crg: use new platform.request	2013-03-26 23:08:35 +01:00