litex/migen
Sebastien Bourdeauducq 8d16fde48c fhdl: add simulation functions in fragment 2012-03-06 13:58:22 +01:00
..
actorlib Use enumerate(x) instead of zip(range(x), x) 2012-02-02 21:28:00 +01:00
bank bank/csrgen: fix RE generation 2012-02-18 18:56:18 +01:00
bus bus/dfi: fix multiphase naming 2012-02-19 17:57:04 +01:00
corelogic Use double quotes for all strings 2012-02-14 13:12:43 +01:00
fhdl fhdl: add simulation functions in fragment 2012-03-06 13:58:22 +01:00
flow Use double quotes for all strings 2012-02-14 13:12:43 +01:00
sim sim: basic functionality working 2012-03-05 20:31:41 +01:00
__init__.py Initial import, FHDL basic structure, divider example 2011-12-04 16:44:38 +01:00