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923fc52e68
litex
/
migen
/
bus
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Sebastien Bourdeauducq
923fc52e68
wishbone: only send ack to the active master in arbiter
2011-12-13 00:25:25 +01:00
..
__init__.py
CSR bus definitions
2011-12-05 00:16:44 +01:00
csr.py
bus: fix CSR interconnect data readback
2011-12-11 20:17:12 +01:00
simple.py
simplebus: export GetSigName function
2011-12-08 23:06:04 +01:00
wishbone.py
wishbone: only send ack to the active master in arbiter
2011-12-13 00:25:25 +01:00
wishbone2csr.py
bus: 14-bit CSR addresses
2011-12-11 20:16:50 +01:00