Sebastien Bourdeauducq 9599eb6fae soc: remove cpu_boot_file argument		2015-04-01 17:32:45 +08:00
..
com	liteusb: give more generic names to modules: FtdiXXX becomes LiteUSBXXX, move PHY outside of core (builds on minispartan6)	2015-03-22 11:11:37 +01:00
cpu	soc: remove cpu_or_bridge and with_cpu arguments	2015-04-01 17:29:51 +08:00
mem	sdram: remove redundant with_l2 parameter (equivalent to l2_size != 0)	2015-03-29 12:34:40 +02:00
others	move mxcrg to others (we should integrate it in mlabs_video.py and remove the verilog file in the future)	2015-02-28 11:51:51 +01:00
soc	soc: remove cpu_boot_file argument	2015-04-01 17:32:45 +08:00
tools	…
video	sdram: create frontend dir and move dma_lasmi/memtest/wishbone2lasmi to it	2015-03-02 08:36:39 +01:00
__init__.py	…