Nathaniel R. Lewis ab3d7e86f2 litex/tools: add command line options and fixes for lxterm to allow crossover uart over PCIe		2021-09-08 18:06:12 -07:00
..
build	build/xilinx/vivado: Add XilinxVivadoCommands for pre_synthesis/placement/routing_commands with add method to automatically resolve LiteX signals'names.	2021-09-08 16:14:58 +02:00
compat	soc/add_spi_flash: Move integration code for previous LiteX SPI Flash core to compat/soc_add_spi_flash.py.	2021-07-29 18:48:03 +02:00
gen	gen/fhdl/verilog: Make DummyAttrTranslate a dict.	2021-07-15 16:48:24 +02:00
soc	interconnect/wishbone: Specify Wishbone version (#999).	2021-09-08 17:33:01 +02:00
tools	litex/tools: add command line options and fixes for lxterm to allow crossover uart over PCIe	2021-09-08 18:06:12 -07:00
__init__.py	revert get_data_mod change (Vexrisv SMP repo has been renamed to pythondata-cpu-vexriscv_smp).	2020-11-05 19:55:18 +01:00