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a3a55fc8fb
litex
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litex
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gen
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Florent Kermarrec
d4d1a1bfd7
gen/fhdl/hierarchy: Sort instances to generate deterministic hierarchy in verilog.
2024-07-03 21:44:31 +02:00
..
fhdl
gen/fhdl/hierarchy: Sort instances to generate deterministic hierarchy in verilog.
2024-07-03 21:44:31 +02:00
genlib
…
sim
…
__init__.py
…
common.py
litex/gen/common: Add short and long byte size definitions.
2024-06-13 09:54:20 +02:00
context.py
…
reduce.py
…
signal.py
…