.. |
__init__.py
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add test directory with test_code_8b10b.py (from misoc)
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2017-04-24 18:46:55 +02:00 |
test_axi.py
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test/test_axi/test_axi_width_converter: Use address_width on Wishbone.Interface to simplify.
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2022-12-08 16:23:15 +01:00 |
test_axi_lite.py
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test/axi_lite: parametrize address and data width in another test; add another test call with 64b data width
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2022-07-20 02:44:57 +02:00 |
test_axi_stream.py
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test: Add minimal test_axi_stream test (Just syntax check for now).
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2022-09-08 11:53:05 +02:00 |
test_bitbang.py
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test: add SPDX License identifier to header and specify file is part of LiteX.
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2020-08-23 15:40:21 +02:00 |
test_clock.py
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cores/clocks/lattice_ecp5: Rename ECP5Delay to ECP5DynamicDelay and adapt style for consistency.
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2022-01-25 11:09:15 +01:00 |
test_code_8b10b.py
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soc/cores/code_8b10b: add StreamEncoder/Decoder (to be used with LiteX's streams).
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2020-10-21 09:29:21 +02:00 |
test_cpu.py
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test_cpu: Add NeoRV32 to tested CPUs
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2022-11-21 15:20:49 +10:30 |
test_csr.py
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soc/interconnect/csr: Add optional support fixed CSR mapping.
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2022-10-21 14:47:59 +02:00 |
test_ecc.py
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test: add SPDX License identifier to header and specify file is part of LiteX.
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2020-08-23 15:40:21 +02:00 |
test_emif.py
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test: add SPDX License identifier to header and specify file is part of LiteX.
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2020-08-23 15:40:21 +02:00 |
test_fifosyncmacro.py
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test: FifoSyncMacro: Use F4PGA instead of deprecated Symbiflow
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2022-06-17 16:27:25 +02:00 |
test_gearbox.py
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inteconnect/stream: Increase io_lcm size when io_lcm/i_dw or io_lcm/o_dw < 2.
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2021-03-18 13:47:10 +01:00 |
test_hyperbus.py
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soc/cores: Re-integrated generic/portable HyperBus/HyperRAM core from LiteHyperBus.
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2022-03-01 09:11:55 +01:00 |
test_i2s.py
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test: add SPDX License identifier to header and specify file is part of LiteX.
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2020-08-23 15:40:21 +02:00 |
test_icap.py
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cores/icap/ICAP: Add Register read capability.
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2021-10-04 17:22:57 +02:00 |
test_led.py
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soc/cores/led: Review/Rework #1265.
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2022-04-04 15:24:54 +02:00 |
test_packet.py
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test: Rename new test_packet/stream to test_packet2/stream2 and revert old tests.
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2021-10-23 17:40:41 +02:00 |
test_prbs.py
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test: add SPDX License identifier to header and specify file is part of LiteX.
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2020-08-23 15:40:21 +02:00 |
test_reduce.py
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gen/common/Reduce: Add ADD support.
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2022-10-28 19:13:27 +02:00 |
test_spi.py
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test: add SPDX License identifier to header and specify file is part of LiteX.
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2020-08-23 15:40:21 +02:00 |
test_spi_opi.py
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test: add SPDX License identifier to header and specify file is part of LiteX.
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2020-08-23 15:40:21 +02:00 |
test_stream.py
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stream/Buffer: Integrate PipeValid/PipeReady (both configurable) and add tests.
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2022-09-07 08:59:37 +02:00 |
test_timer.py
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test/test_timer: Update.
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2021-05-27 19:37:51 +02:00 |
test_wishbone.py
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soc/interconnect/wishbone: Cleanup in burst cycles support logic
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2022-04-12 15:32:29 +02:00 |