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litex/misoclib/com/liteusb/core
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Florent Kermarrec 603b4cdc8c liteusb: continue refactoring (virtual UART and DMA working on minispartan6) 
- rename ft2232h phy to ft245.
- make crc optional
- fix depacketizer
- refactor uart (it's now only a wrapper around standard UART)
- fix and update dma
 		2015-05-01 16:11:15 +02:00
..
__init__.py liteusb: continue refactoring (virtual UART and DMA working on minispartan6) 2015-05-01 16:11:15 +02:00
crc.py liteusb: continue refactoring and add core_tb (should be almost OK) 2015-04-28 18:58:38 +02:00
crossbar.py liteusb: continue refactoring (virtual UART and DMA working on minispartan6) 2015-05-01 16:11:15 +02:00
packet.py liteusb: continue refactoring (virtual UART and DMA working on minispartan6) 2015-05-01 16:11:15 +02:00