Florent Kermarrec 8c080e5fb6 soc/interconnect/csr: add initial field support		2019-09-13 20:01:31 +02:00
..
__init__.py	add test directory with test_code_8b10b.py (from misoc)	2017-04-24 18:46:55 +02:00
test_axi.py	test/test_axi: remove use of rand_wait, rename rand_level to random	2019-07-23 21:02:09 +02:00
test_bitbang.py	cores: add bitbang class with minimal hardware for I2C/SPI software bit-banging	2019-07-05 14:26:10 +02:00
test_code_8b10b.py	test: add copyright header	2019-06-23 23:31:11 +02:00
test_csr.py	soc/interconnect/csr: add initial field support	2019-09-13 20:01:31 +02:00
test_ecc.py	soc/cores: add ECC (Error Correcting Code)	2019-07-13 11:44:29 +02:00
test_gearbox.py	test: add copyright header	2019-06-23 23:31:11 +02:00
test_hyperbus.py	soc/core: simplify/cleanup HyperRAM core	2019-08-16 14:04:58 +02:00
test_icap.py	cores: add ICAP core (tested with reconfiguration commands)	2019-07-05 18:30:34 +02:00
test_prbs.py	test: add copyright header	2019-06-23 23:31:11 +02:00
test_spi.py	core/spi: add minimal SPISlave	2019-08-29 09:46:20 +02:00
test_targets.py	boards: community supported boards are now located at https://github.com/litex-hub/litex-boards	2019-06-24 12:05:02 +02:00