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Build your hardware, easily!
18 Commits 40 Branches 14 Tags 26 MiB
C 52.8%
Python 43.5%
Assembly 1.4%
SystemVerilog 1.3%
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Sebastien Bourdeauducq bf021efa2b verilog: fix unary operator conversion 2011-12-08 21:15:24 +01:00
examples Instance support 2011-12-08 16:35:32 +01:00
migen verilog: fix unary operator conversion 2011-12-08 21:15:24 +01:00
.gitignore Initial import, FHDL basic structure, divider example 2011-12-04 16:44:38 +01:00