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litex
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https://github.com/enjoy-digital/litex.git
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Build your hardware, easily!
fpga
hardware
system-on-chip
40
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42
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14
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30
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C
52.7%
Python
43.6%
Assembly
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bfd2bf4ed3
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Sebastien Bourdeauducq
bfd2bf4ed3
tools: remove bin2hex
2012-02-08 15:08:03 +01:00
build
Initial import
2011-12-13 17:33:12 +01:00
milkymist
uart: RX support
2012-02-07 14:12:23 +01:00
software
libbase: blocking UART write if IRQs are enabled
2012-02-07 15:12:27 +01:00
tb
/norflash
Convert -> convert
2012-01-05 19:27:45 +01:00
tools
tools: remove bin2hex
2012-02-08 15:08:03 +01:00
verilog
LM32: make IP read-only and interrupt lines level-sensitive
2012-02-07 00:07:12 +01:00
.gitignore
Update gitignore
2012-02-05 20:01:14 +01:00
build.py
Convert -> convert
2012-01-05 19:27:45 +01:00
constraints.py
Multiply system clock
2011-12-17 15:00:18 +01:00
top.py
sram: fix sub-word write
2012-02-06 23:13:35 +01:00