Florent Kermarrec a266deb58e LiteXXX cores: fix frequency print in test/test_regs.py		2015-03-17 16:01:25 +01:00
..
liteeth	LiteXXX cores: fix frequency print in test/test_regs.py	2015-03-17 16:01:25 +01:00
liteusb	sdram: create frontend dir and move dma_lasmi/memtest/wishbone2lasmi to it	2015-03-02 08:36:39 +01:00
spi	com/spi: use .format in tb	2015-03-03 10:44:05 +01:00
uart	uart/liteeth: only import the phy we are going to use (UARTPHYSim cannot be imported on Windows since based on pty).	2015-03-12 16:57:38 +01:00
__init__.py	misoclib: better organization (create cores categories: cpu, mem, com, ...)	2015-02-28 09:40:44 +01:00