litex/misoclib/com/liteeth/example_designs/test
Florent Kermarrec a266deb58e LiteXXX cores: fix frequency print in test/test_regs.py 2015-03-17 16:01:25 +01:00
..
make.py LiteXXX cores: convert port parameter to int if is digit in test/make.py 2015-03-17 15:58:21 +01:00
test_etherbone.py misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00
test_la.py litescope: move files and modify import to misoclib.tools.litescope 2015-02-28 10:33:46 +01:00
test_regs.py LiteXXX cores: fix frequency print in test/test_regs.py 2015-03-17 16:01:25 +01:00
test_tty.py misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00
test_udp.py misoclib: better organization (create cores categories: cpu, mem, com, ...) 2015-02-28 09:40:44 +01:00