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cd6c04b24f
litex
/
misoclib
/
com
/
liteeth
/
mac
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core
History
Florent Kermarrec
6cbf13036b
liteeth/mac: fix padding limit (+1), netboot OK with sim platform
2015-03-09 20:59:34 +01:00
..
__init__.py
liteeth: do not insert CRC/Preamble in simulation to allow direct connection to ethernet tap
2015-03-09 13:23:37 +01:00
crc.py
misoclib: better organization (create cores categories: cpu, mem, com, ...)
2015-02-28 09:40:44 +01:00
gap.py
misoclib: better organization (create cores categories: cpu, mem, com, ...)
2015-02-28 09:40:44 +01:00
last_be.py
misoclib: better organization (create cores categories: cpu, mem, com, ...)
2015-02-28 09:40:44 +01:00
padding.py
liteeth/mac: fix padding limit (+1), netboot OK with sim platform
2015-03-09 20:59:34 +01:00
preamble.py
misoclib: better organization (create cores categories: cpu, mem, com, ...)
2015-02-28 09:40:44 +01:00