litex/litex
Florent Kermarrec dd7a04a5c0 liblitedram/sdram_leveling_center_module: Do a check after final delay configuration.
On ECP5/DDR3, final configuration does not seem to be done correctly each time.
Add a retry/check mechanism to workaround the issue for now.
2022-03-22 17:12:50 +01:00
..
build build/soc/cpu parser: Improve titles. 2022-03-21 17:53:30 +01:00
compat cores/spi_flash: Deprecate SPI Flash MMAPed cores (Designs have been switched with LiteSPI). 2022-01-07 19:08:03 +01:00
gen soc/cores/jtag: Review/Cleanup JTAGTAPFSM and avoid specific CorrectedOngoingResetFSM. 2022-01-31 16:07:50 +01:00
soc liblitedram/sdram_leveling_center_module: Do a check after final delay configuration. 2022-03-22 17:12:50 +01:00
tools tools/litex_sim: Use new get_boot_address function. 2022-03-17 17:46:27 +01:00
__init__.py get_data_mod: Update pip to pip3 to avoid issues on systems with Python2 still installed. 2021-09-28 16:27:13 +02:00