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litex
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misoclib
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Florent Kermarrec
82fe83a1c4
sdram: raise NotImplementedError if Minicon is used others memories than SDR (not functional for now)
2015-03-19 16:08:03 +01:00
..
com
liteeth/mac/core: add with_padding option (enabled by default) and change with_hw_preamble_crc option to with_preamble_crc
2015-03-19 14:52:02 +01:00
cpu
litescope: create example design derived from SoC that can be used on all targets
2015-02-28 22:19:24 +01:00
mem
liteeth: use bios ip_address in example designs
2015-03-18 18:18:43 +01:00
others
move mxcrg to others (we should integrate it in mlabs_video.py and remove the verilog file in the future)
2015-02-28 11:51:51 +01:00
soc
sdram: raise NotImplementedError if Minicon is used others memories than SDR (not functional for now)
2015-03-19 16:08:03 +01:00
tools
liteeth: use bios ip_address in example designs
2015-03-18 18:18:43 +01:00
video
sdram: create frontend dir and move dma_lasmi/memtest/wishbone2lasmi to it
2015-03-02 08:36:39 +01:00
__init__.py
rename milkymist-ng to MiSoC
2013-11-09 15:27:32 +01:00