This website requires JavaScript.
Explore
Help
Sign In
Hardware
/
litex
mirror of
https://github.com/enjoy-digital/litex.git
Watch
1
Star
0
Fork
You've already forked litex
0
Code
Issues
Packages
Projects
Releases
Wiki
Activity
ec465959d0
litex
/
misoclib
/
com
History
Florent Kermarrec
84b631c929
liteeth/mac/core: add with_padding option (enabled by default) and change with_hw_preamble_crc option to with_preamble_crc
2015-03-19 14:52:02 +01:00
..
liteeth
liteeth/mac/core: add with_padding option (enabled by default) and change with_hw_preamble_crc option to with_preamble_crc
2015-03-19 14:52:02 +01:00
liteusb
sdram: create frontend dir and move dma_lasmi/memtest/wishbone2lasmi to it
2015-03-02 08:36:39 +01:00
spi
com/spi: use .format in tb
2015-03-03 10:44:05 +01:00
uart
uart/liteeth: only import the phy we are going to use (UARTPHYSim cannot be imported on Windows since based on pty).
2015-03-12 16:57:38 +01:00
__init__.py
misoclib: better organization (create cores categories: cpu, mem, com, ...)
2015-02-28 09:40:44 +01:00