Florent Kermarrec ec6ae75065 liteeth: use CRG from Migen in base example		2015-03-17 12:11:51 +01:00
..
targets	liteeth: use CRG from Migen in base example	2015-03-17 12:11:51 +01:00
test	LiteXXX cores: fix test_reg.py	2015-03-04 23:13:14 +01:00
__init__.py	misoclib: better organization (create cores categories: cpu, mem, com, ...)	2015-02-28 09:40:44 +01:00
make.py	liteeth: create example design derived from SoC that can be used on all targets with Ethernet pins	2015-02-28 23:33:00 +01:00