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litex/misoclib/mem/sdram/core/minicon
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Florent Kermarrec f40140dba5 sdram: refactor minicon and fix issues with DDRx memories 
- simplify code
- fix AddressSlicer
- manage write latency and write to precharge timings
- add odt/reset_n signals
2015-05-29 12:31:56 +02:00
..
__init__.py sdram: refactor minicon and fix issues with DDRx memories 2015-05-29 12:31:56 +02:00