Florent Kermarrec 05b0c59607 interconnect: For now remove the address_width checks; more verification will have to be done before enabling it to avoid regressions.		2022-11-14 10:34:48 +01:00
..
build	build/altera/platform: Don't set keep attribute on clk signal when using add_period_constraints.	2022-11-11 10:06:20 +01:00
compat	compat/soc_core: Fix register_mem/rom missing imports.	2022-11-09 19:11:15 +01:00
gen	gen/fhdl/hierarchy: Use [] for BlackBoxes.	2022-11-08 15:08:12 +01:00
soc	interconnect: For now remove the address_width checks; more verification will have to be done before enabling it to avoid regressions.	2022-11-14 10:34:48 +01:00
tools	Merge pull request #1496 from MateuszKarlic/json2renode-update	2022-11-09 15:52:31 +01:00
__init__.py	colorer: Avoid duplication and move it to litex/gen.	2022-11-03 09:49:51 +01:00