stone3311 f8d2f1adde cores/jtag: Add more Altera part numbers		2022-12-31 14:21:13 +01:00
..
build	build/altera: Fix IP integration	2022-12-23 16:51:35 +01:00
compat	compat/soc_core: Fix register_mem/rom missing imports.	2022-11-09 19:11:15 +01:00
gen	gen/fhdl/module: Add add/get_module methods to simplify user design and avoid direct use of setattr/getattr.	2022-12-08 14:20:38 +01:00
soc	cores/jtag: Add more Altera part numbers	2022-12-31 14:21:13 +01:00
tools	tools/litex_cli: Fix --write.	2022-12-12 11:26:37 +01:00
__init__.py	colorer: Avoid duplication and move it to litex/gen.	2022-11-03 09:49:51 +01:00