2017-07-29 10:01:39 -04:00
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2019-11-14 06:26:47 -05:00
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CROSS=riscv32-unknown-elf-
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CFLAGS=
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2017-08-07 09:13:27 -04:00
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# ---- iCE40 HX8K Breakout Board ----
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2018-10-01 08:00:21 -04:00
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hx8ksim: hx8kdemo_tb.vvp hx8kdemo_fw.hex
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vvp -N $< +firmware=hx8kdemo_fw.hex
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2017-08-07 16:36:58 -04:00
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2018-10-01 08:00:21 -04:00
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hx8ksynsim: hx8kdemo_syn_tb.vvp hx8kdemo_fw.hex
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2019-02-11 17:13:05 -05:00
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vvp -N $< +firmware=hx8kdemo_fw.hex
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2017-08-07 16:36:58 -04:00
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2017-08-11 13:30:53 -04:00
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hx8kdemo.blif: hx8kdemo.v spimemio.v simpleuart.v picosoc.v ../picorv32.v
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2017-08-07 09:13:27 -04:00
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yosys -ql hx8kdemo.log -p 'synth_ice40 -top hx8kdemo -blif hx8kdemo.blif' $^
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2017-08-11 13:30:53 -04:00
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hx8kdemo_tb.vvp: hx8kdemo_tb.v hx8kdemo.v spimemio.v simpleuart.v picosoc.v ../picorv32.v spiflash.v
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2017-11-11 13:49:01 -05:00
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iverilog -s testbench -o $@ $^ `yosys-config --datdir/ice40/cells_sim.v`
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2017-08-07 16:36:58 -04:00
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hx8kdemo_syn_tb.vvp: hx8kdemo_tb.v hx8kdemo_syn.v spiflash.v
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iverilog -s testbench -o $@ $^ `yosys-config --datdir/ice40/cells_sim.v`
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hx8kdemo_syn.v: hx8kdemo.blif
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yosys -p 'read_blif -wideports hx8kdemo.blif; write_verilog hx8kdemo_syn.v'
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2017-08-07 09:13:27 -04:00
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hx8kdemo.asc: hx8kdemo.pcf hx8kdemo.blif
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arachne-pnr -d 8k -o hx8kdemo.asc -p hx8kdemo.pcf hx8kdemo.blif
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hx8kdemo.bin: hx8kdemo.asc
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icetime -d hx8k -c 12 -mtr hx8kdemo.rpt hx8kdemo.asc
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icepack hx8kdemo.asc hx8kdemo.bin
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2018-08-30 16:27:34 -04:00
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hx8kprog: hx8kdemo.bin hx8kdemo_fw.bin
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2017-09-21 13:45:41 -04:00
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iceprog hx8kdemo.bin
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2018-08-30 16:27:34 -04:00
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iceprog -o 1M hx8kdemo_fw.bin
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2017-09-21 13:45:41 -04:00
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2018-08-30 16:27:34 -04:00
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hx8kprog_fw: hx8kdemo_fw.bin
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iceprog -o 1M hx8kdemo_fw.bin
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2017-09-21 13:45:41 -04:00
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2019-03-01 19:57:22 -05:00
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hx8kdemo_sections.lds: sections.lds
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2019-11-14 06:26:47 -05:00
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$(CROSS)cpp -P -DHX8KDEMO -o $@ $^
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2019-02-11 17:44:47 -05:00
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hx8kdemo_fw.elf: hx8kdemo_sections.lds start.s firmware.c
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2019-11-14 06:26:47 -05:00
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$(CROSS)gcc $(CFLAGS) -DHX8KDEMO -march=rv32imc -Wl,-Bstatic,-T,hx8kdemo_sections.lds,--strip-debug -ffreestanding -nostdlib -o hx8kdemo_fw.elf start.s firmware.c
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2018-08-19 07:38:59 -04:00
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hx8kdemo_fw.hex: hx8kdemo_fw.elf
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2019-11-14 06:26:47 -05:00
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$(CROSS)objcopy -O verilog hx8kdemo_fw.elf hx8kdemo_fw.hex
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2018-08-19 07:38:59 -04:00
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hx8kdemo_fw.bin: hx8kdemo_fw.elf
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2019-11-14 06:26:47 -05:00
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$(CROSS)objcopy -O binary hx8kdemo_fw.elf hx8kdemo_fw.bin
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2018-08-19 07:38:59 -04:00
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2018-08-18 14:17:21 -04:00
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# ---- iCE40 IceBreaker Board ----
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2018-10-01 08:00:21 -04:00
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icebsim: icebreaker_tb.vvp icebreaker_fw.hex
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vvp -N $< +firmware=icebreaker_fw.hex
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2018-08-18 14:17:21 -04:00
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2018-10-01 08:00:21 -04:00
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icebsynsim: icebreaker_syn_tb.vvp icebreaker_fw.hex
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vvp -N $< +firmware=icebreaker_fw.hex
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2018-08-18 14:17:21 -04:00
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2019-02-11 17:13:05 -05:00
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icebreaker.json: icebreaker.v ice40up5k_spram.v spimemio.v simpleuart.v picosoc.v ../picorv32.v
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2018-08-18 14:17:21 -04:00
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yosys -ql icebreaker.log -p 'synth_ice40 -top icebreaker -json icebreaker.json' $^
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2019-02-11 17:13:05 -05:00
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icebreaker_tb.vvp: icebreaker_tb.v icebreaker.v ice40up5k_spram.v spimemio.v simpleuart.v picosoc.v ../picorv32.v spiflash.v
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2018-08-18 14:17:21 -04:00
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iverilog -s testbench -o $@ $^ `yosys-config --datdir/ice40/cells_sim.v`
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icebreaker_syn_tb.vvp: icebreaker_tb.v icebreaker_syn.v spiflash.v
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iverilog -s testbench -o $@ $^ `yosys-config --datdir/ice40/cells_sim.v`
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icebreaker_syn.v: icebreaker.json
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yosys -p 'read_json icebreaker.json; write_verilog icebreaker_syn.v'
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icebreaker.asc: icebreaker.pcf icebreaker.json
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nextpnr-ice40 --freq 13 --up5k --asc icebreaker.asc --pcf icebreaker.pcf --json icebreaker.json
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icebreaker.bin: icebreaker.asc
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icetime -d up5k -c 12 -mtr icebreaker.rpt icebreaker.asc
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icepack icebreaker.asc icebreaker.bin
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2018-08-19 07:38:59 -04:00
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icebprog: icebreaker.bin icebreaker_fw.bin
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2018-08-18 14:17:21 -04:00
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iceprog icebreaker.bin
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2018-08-19 07:38:59 -04:00
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iceprog -o 1M icebreaker_fw.bin
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2018-08-18 14:17:21 -04:00
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2018-08-19 07:38:59 -04:00
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icebprog_fw: icebreaker_fw.bin
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iceprog -o 1M icebreaker_fw.bin
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2017-08-07 09:13:27 -04:00
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2019-02-11 17:44:47 -05:00
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icebreaker_sections.lds: sections.lds
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2019-11-14 06:26:47 -05:00
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$(CROSS)cpp -P -DICEBREAKER -o $@ $^
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2019-02-11 17:44:47 -05:00
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icebreaker_fw.elf: icebreaker_sections.lds start.s firmware.c
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2019-11-14 06:26:47 -05:00
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$(CROSS)gcc $(CFLAGS) -DICEBREAKER -march=rv32ic -Wl,-Bstatic,-T,icebreaker_sections.lds,--strip-debug -ffreestanding -nostdlib -o icebreaker_fw.elf start.s firmware.c
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2017-07-29 10:01:39 -04:00
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2018-08-19 07:38:59 -04:00
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icebreaker_fw.hex: icebreaker_fw.elf
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2019-11-14 06:26:47 -05:00
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$(CROSS)objcopy -O verilog icebreaker_fw.elf icebreaker_fw.hex
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2017-07-29 10:01:39 -04:00
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2018-08-19 07:38:59 -04:00
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icebreaker_fw.bin: icebreaker_fw.elf
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2019-11-14 06:26:47 -05:00
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$(CROSS)objcopy -O binary icebreaker_fw.elf icebreaker_fw.bin
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2017-07-29 10:01:39 -04:00
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2017-09-21 13:45:41 -04:00
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# ---- Testbench for SPI Flash Model ----
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spiflash_tb: spiflash_tb.vvp firmware.hex
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vvp -N $<
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spiflash_tb.vvp: spiflash.v spiflash_tb.v
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iverilog -s testbench -o $@ $^
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2017-10-01 09:45:46 -04:00
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# ---- ASIC Synthesis Tests ----
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cmos.log: spimemio.v simpleuart.v picosoc.v ../picorv32.v
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yosys -l cmos.log -p 'synth -top picosoc; abc -g cmos2; opt -fast; stat' $^
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2017-08-07 09:13:27 -04:00
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# ---- Clean ----
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2017-07-29 10:01:39 -04:00
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clean:
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2017-08-05 11:08:16 -04:00
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rm -f testbench.vvp testbench.vcd spiflash_tb.vvp spiflash_tb.vcd
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2018-08-19 07:38:59 -04:00
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rm -f hx8kdemo_fw.elf hx8kdemo_fw.hex hx8kdemo_fw.bin cmos.log
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rm -f icebreaker_fw.elf icebreaker_fw.hex icebreaker_fw.bin
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2017-08-07 09:13:27 -04:00
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rm -f hx8kdemo.blif hx8kdemo.log hx8kdemo.asc hx8kdemo.rpt hx8kdemo.bin
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2017-08-07 16:36:58 -04:00
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rm -f hx8kdemo_syn.v hx8kdemo_syn_tb.vvp hx8kdemo_tb.vvp
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2018-08-18 14:17:21 -04:00
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rm -f icebreaker.json icebreaker.log icebreaker.asc icebreaker.rpt icebreaker.bin
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rm -f icebreaker_syn.v icebreaker_syn_tb.vvp icebreaker_tb.vvp
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2017-07-29 10:01:39 -04:00
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2018-08-18 14:17:21 -04:00
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.PHONY: spiflash_tb clean
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.PHONY: hx8kprog hx8kprog_fw hx8ksim hx8ksynsim
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.PHONY: icebprog icebprog_fw icebsim icebsynsim
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