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VexRiscv
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Merge branch 'dev'

This commit is contained in:
Dolu1990 2023-11-02 11:59:51 +01:00
parent 07b0d7788b 0f17b395bd
commit 05df181257
1 changed files with 2 additions and 1 deletions
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3
src/main/scala/vexriscv/plugin/DBusCachedPlugin.scala
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@ -680,7 +680,8 @@ class IBusDBusCachedTightlyCoupledRam(mapping : SizeMapping, withIBus : Boolean
address = (dbus.address >> 2).resized, address = (dbus.address >> 2).resized,
data = dbus.write_data, data = dbus.write_data,
enable = dbus.enable, enable = dbus.enable,
write = dbus.write_enable write = dbus.write_enable,
mask = dbus.write_mask
) )
} }
val i = withIBus generate new Area { val i = withIBus generate new Area {