2022-05-31 07:32:59 -04:00
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#!/usr/bin/env python3
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2019-04-05 10:56:47 -04:00
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# -*- coding: utf-8 -*-
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#
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2022-05-31 07:32:59 -04:00
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# Copyright (C) 2020-2022 F4PGA Authors.
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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2022-02-09 19:53:12 -05:00
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# Updated documentation of the configuration options is available at
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# https://www.sphinx-doc.org/en/master/usage/configuration.html
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2019-04-05 10:56:47 -04:00
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import sys, os
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from pathlib import Path
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from tabulate import tabulate
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ROOT = Path(__file__).resolve().parent
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2019-04-05 10:56:47 -04:00
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#sys.path.insert(0, os.path.abspath('.'))
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2022-07-31 04:51:46 -04:00
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sys.path.insert(0, str(ROOT))
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from changes import generate_changes_inc
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# -- Generate development/changes.inc ----------------------------------------------------------------------------------
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generate_changes_inc()
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# -- Generate status.inc -----------------------------------------------------------------------------------------------
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with (ROOT / "status.inc").open("w", encoding="utf-8") as wfptr:
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wfptr.write(
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tabulate(
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[
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["[Basic Tiles] Logic", "Yes", "Yes", "Yes", "Yes"],
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["[Basic Tiles] Block RAM", "Yes", "Yes", "Partial", "Yes"],
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["[Advanced Tiles] DSP", "Yes", "Yes", "Partial", "Yes"],
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["[Advanced Tiles] Hard Blocks", "Yes", "Yes", "Partial", "Yes"],
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["[Advanced Tiles] Clock Tiles", "Yes", "Yes", "Yes", "Yes"],
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["[Advanced Tiles] IO Tiles", "Yes", "Yes", "Yes", "Yes"],
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["[Routing] Logic", "Yes", "Yes", "Yes", "Yes"],
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["[Routing] Clock", "Yes", "Yes", "Yes", "Yes"],
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],
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headers=["", "Project Icestorm", "Project Trellis ", "Project X-Ray", "QuickLogic Database"],
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tablefmt="rst",
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)
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)
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# -- General configuration ---------------------------------------------------------------------------------------------
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project = 'F4PGA'
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basic_filename = 'f4pga-docs'
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authors = 'F4PGA Authors'
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copyright = f'{authors}, 2019 - 2022'
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version = ''
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release = '' # The full version, including alpha/beta/rc tags.
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extensions = [
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'sphinx.ext.extlinks',
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'sphinx.ext.intersphinx',
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'sphinx_verilog_domain',
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'sphinxcontrib.bibtex',
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'myst_parser'
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]
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bibtex_default_style = 'plain'
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bibtex_bibfiles = ['refs.bib']
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myst_enable_extensions = [
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"colon_fence",
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]
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numfig = True
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templates_path = ['_templates']
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source_suffix = {
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'.rst': 'restructuredtext',
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'.md': 'markdown'
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}
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master_doc = 'index'
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today_fmt = '%Y-%m-%d'
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exclude_patterns = [
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'env'
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]
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pygments_style = 'default'
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rst_prolog = """
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.. role:: raw-latex(raw)
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:format: latex
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.. role:: raw-html(raw)
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:format: html
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"""
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# -- Options for HTML output -------------------------------------------------------------------------------------------
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html_show_sourcelink = True
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html_theme = 'sphinx_f4pga_theme'
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html_theme_options = {
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'repo_name': 'chipsalliance/f4pga',
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'github_url' : 'https://github.com/chipsalliance/f4pga',
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'globaltoc_collapse': True,
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'color_primary': 'indigo',
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'color_accent': 'blue',
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}
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html_static_path = ['_static']
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html_logo = str(Path(html_static_path[0]) / 'logo.svg')
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html_favicon = str(Path(html_static_path[0]) / 'favicon.svg')
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# -- Options for LaTeX output ------------------------------------------------------------------------------------------
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latex_documents = [
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('index', basic_filename+'.tex', project,
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authors, 'manual'),
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]
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latex_elements = {
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'papersize': 'a4paper',
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'pointsize': '11pt',
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'fontpkg': r'''
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\usepackage{charter}
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\usepackage[defaultsans]{lato}
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\usepackage{inconsolata}
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''',
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'preamble': r'''
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\usepackage{multicol}
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''',
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'maketitle': r'''
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\renewcommand{\releasename}{}
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\maketitle
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''',
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'classoptions':',openany,oneside',
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'babel': r'''
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\usepackage[english]{babel}
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\makeatletter
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\@namedef{ver@color.sty}{}
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\makeatother
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\usepackage{silence}
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\WarningFilter{Fancyhdr}{\fancyfoot's `E' option without twoside}
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'''
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}
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# -- Options for manual page output ------------------------------------------------------------------------------------
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man_pages = [
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('index', basic_filename, project,
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[authors], 1)
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]
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# -- Sphinx.Ext.InterSphinx --------------------------------------------------------------------------------------------
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intersphinx_mapping = {
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"python": ("https://docs.python.org/3/", None),
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"arch-defs": ("https://f4pga.readthedocs.io/projects/arch-defs/en/latest/", None),
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"constraints": ("https://hdl.github.io/constraints/", None),
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"fasm": ("https://fasm.readthedocs.io/en/latest/", None),
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"interchange": ("https://fpga-interchange-schema.readthedocs.io/", None),
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"openfpgaloader": ("https://trabucayre.github.io/openFPGALoader/", None),
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"prjtrellis": ("https://prjtrellis.readthedocs.io/en/latest/", None),
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"prjxray": ("https://f4pga.readthedocs.io/projects/prjxray/en/latest/", None),
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"vtr": ("https://docs.verilogtorouting.org/en/latest/", None),
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}
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# -- Sphinx.Ext.ExtLinks -----------------------------------------------------------------------------------------------
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extlinks = {
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'wikipedia': ('https://en.wikipedia.org/wiki/%s', 'wikipedia:'),
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'gh': ('https://github.com/%s', 'gh:'),
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'ghsharp': ('https://github.com/chipsalliance/f4pga/issues/%s', '#'),
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'ghissue': ('https://github.com/chipsalliance/f4pga/issues/%s', 'issue #'),
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'ghpull': ('https://github.com/chipsalliance/f4pga/pull/%s', 'pull request #'),
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'ghsrc': ('https://github.com/chipsalliance/f4pga/blob/master/%s', '')
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}
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